Technology Labs

Advance Spartan-7 FPGA Platform for VLSI Lab

  • Applications of Finite State Machines in FPGA.

  • Onboard

  • Traffic light controller

  • Elevator controller

  • User interface

  • 16 input switches

  • 4X4 LED matrix

  • Two 7-segment displays

  • OLED display

  • FPGA configuration through USB JTAG.

  • On board Breadboard

  • Free I/O’s on Connector

  • JTAG to USB programming cable will be provided with the system.

  • System on Module Board

  • Device : FPGA SPARTAN 7 XC7S50-1FGGA484I

  • DDR3 : 256 MBit, DDR3

  • JTAG: Onboard standard JTAG Connector 14-pin 2 mm pitch dual row

  • DEBUG: UART Debug interface over USB type Cconnector

  • USB: "On board are 2 USB 2.0 Type A connectors. Self-powerUSB ports"

  • EPROM: I2C EEPROM 1Mbit size

  • Flash: Onboard Programming Flash 128MB

  • IOs: 3 Nos of IO 0.8mm board-to-board connector with Max169, 3.3V

  • IOs

  • LEDs: Onboard 3 LEDs for Indications.

  • EPROM I2C EEPROM 1Mbit size

  • Carrier Board

  • Power Supply: 2.5V,3.3V & 1.2V

  • Onboard function generator

  • LEDs: Onboard 3 LEDs for Indications

  • EPROM I2C EEPROM 1Mbit size.

  • Carrier Board

  • Power Supply: 2.5V,3.3V & 1.2V

  • Onboard function generator

  • Provision for Square and Triangular wave generation

  • Frequency variable from 40 to 100 KHz with provision fine and coarse selection for both square and triangular wave.

  • Offset adjustment for triangular wave

  • Onboard Motor interface

  • Stepper motor interface using 5-VDC, 200-step/revolution motor

  • 5V DC, DC motor interfaced using unpolarized connectionso that it can be reversed

  • Onboard Relay Interface

  • One NO and one NC contact are provided using a 5-VDC relay.

  • Real-time clock interface using I2C bus

  • Onboard Buzzer Interface

  • Analog inputs

  • ADC AD7934 (12-bit) with 4 channels to be used

  • Thermistor interface to be given to ADC channel 4

  • Anti-aliasing filter at the input of ADC (channel 1) with provision for time constant adjustment

  • Analog output

  • DAC TLV 5619 (12-bit, 100 ns conversion time)

  • Reconstruction filter at the output DAC with provision for time constant adjustment

  • Implementation of Multiplexer, Decoders, Encoders, Flip Flop, Counters etc.

  • Design and Implementation of RAM and ROM using FPGA

  • Design and Implementation of4-bit, 8-bitand 32-bit Arithmetic Logic Unit (ALU)

  • Interfacing of ADC & DAC and develop an application to display Temperature

  • Applications of Finite State Machine in FPGA like Traffic Light Controller & Elevator Controller

  • PRBS Generator

  • RTC Interface using I2C Bus

  • Design Applications using LED Matrix

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